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Comments:
<0> mmmm... pizza
<1> heya
<2> yo
<1> uha
<2> hm?
<1> just mind singing
<2> huh
<3> hi all
<1> nhi rutski
<4> hi
<4> i'm looking for a methot to use vesa interrupts in protected mode
<4> do you have any idea
<5> what are vesa interrupts?
<6> use v86
<6> the alternatives are dynamically recompiling the bios code
<6> or doing it before pmode
<6> linus__^: they're standardized bios functions for extended graphics modes
<5> i see
<6> I only know of one person that's doing the dynamic recompiling... and he's insane. V86 is the standard way. That's how svgalib does it, it's how the x11 drivers do it
<6> basically,, create the necessary functions to get the bios to dump all the gfx modes, switch to them, etc in 16 bit code
<6> make them consecutive and page align them, then map them to the beginning of memory and schedule them as a v86 task, and wait for each one to complete after calling it.
<4> a) vm86
<4> b) go back to real mode
<4> c) vbe 3
<6> oops, forgot vbe3. Doesn't seem well supported
<6> I don't think vmware supports it
<6> how do you add the CVS tag to files, like $NetBSD: vm86.h,v 1.14 2006/02/16 20:17:13 perry Exp $
<1> $ID$
<1> and stuff
<1> you can configure the names in the repo's config files
<7> hey i have a real simple question that i'm sure no one will answer...
<6> trans2_: I'll give it my best shot
<7> in glib, using the i_io_add_watch function (or any other such function) can you add a GIOChannel twice (ie. with 2 different callback functions) or is does it only allow you to add one callback per channel (eg. socket)
<8> trans2: why do you ask it here?
<6> might want to ask in #gnome
<9> why not?
<9> =)
<8> because it's completely offtopic
<9> so
<9> =)
<9> don't know if i'll get to it though
<6> http://fxr.watson.org/fxr/source/arch/i386/bioscall/biostramp.S?v=NETBSD dunno if that VESA guy is still there, but this might be what he's looking for
<6> http://fxr.watson.org/fxr/source/arch/i386/i386/multiboot.c?v=NETBSD#L128 why are they warning about running with relative addresses after paging is enabled http://fxr.watson.org/fxr/source/arch/i386/i386/locore.S?v=NETBSD#L580 and multiboot_pre_reloc is called shortly after?
<6> oops, my bad my bad... I got pre_reloc and post_reloc confused :-P
<6> sorry
<10> should I use pushad for my ISR handlers or just push regs by myself?
<8> it's to your choice
<10> hmm, so none of them are actually vital?
<8> ?
<10> to be pushed when an ISR fires?
<6> either you can do it by hand
<6> or you can let the intel microcode do it by itself
<10> ah
<6> your choice
<10> but the ones I see pushed are different in different code..
<10> like some people push es, fs, gs, ss while others use pushad
<10> does the intel microcode push every reg?
<10> and seg?
<8> RTFM
<8> carefully
<10> well I'm looking
<8> it says clearly what is pushed and what not
<8> then you can decide yourself what you need and whatnot
<8> it's all yours
<10> it says here...EFLAGS,CS EIP
<8> right... and sometimes the stack registers
<6> is putting video memory at 0xa0000 a common thing?
<6> the netbsd atari arch expects it's there, as does x86
<6> bebox... shark... seems like it's just a vga thing
<11> it's not common
<11> but implementations that emulate a peecee put it there
<11> i can see the bebox, not sure about the shark or the atari
<6> what's the ic stand for in sys/dev/ic ?
<11> no idea
<12> hi, morning
<12> how much intruction cycle can be taken in INVLPG instruction ?
<12> I want to know, if a TLB with 96 entry, a single TLB flush VS. 96 times INVLPG, which is faster ..
<11> good question, unknown
<11> i put the threshold at 64 entries before switching to a global flush
<12> geist: I just want to know, if many many TLB entries are valid in TLB (x86 processor), INVLPG for each and flush TLB, which is better ?
<12> this is what I want to know,,,, :-)
<11> it's hard to tell
<12> and work one
<12> and work on
<11> different cpus have different numbers of TLBs
<11> so the crossover point is probably different depending on the implementation
<12> yes, I even have no idea that how to know the TLB size of a CPU.
<12> geist: yes, you are right
<11> so pick a number and go with it
<11> it's all a microoptimization anyway
<11> i chose 64. that's the common size of tlbs for cpus about 5 years back or so
<11> nowadays i think a modern amd or intel has something like 64 level 1 tlbs, and 1024 level 2
<12> geist: thank you !
<12> can you give me some points that where can I find this kind of documents ?
<11> sandpile.org has some interesting info
<11> otherwise it's just standard intel stuff
<11> it doesn't matter, you can't really control what invlpg does
<11> anyway, it's *totally* a microoptimization at this point
<8> wow, 1024 TLBs?
<11> I wouldn't worry about it
<11> yeah, i was surprised too. they're 2nd level though
<11> so only referenced if the 1st level misses
<11> it's unclear what the cycle count is for a 1st level miss
<8> I've never heard yet of multiple level TLBs
<8> is this just a cache hierarchy?
<11> yeah
<11> i think only the latest set of x86s have it
<11> and arm11s have a 2 level TLB
<11> core cpus are a bit different: http://sandpile.org/impl/core.htm
<11> http://sandpile.org/impl/k8.htm
<11> oh there, it lists it as a 10 cycle latency, presumably to load from l2 into l1
<12> geist: thank you, I visit this website right now :-)
<11> yeah, it's a great site
<12> I will try whether I can find how much cycles TLB flush and INVLPG will take :-)
<6> geist: What do you think of QNX's ipc?
<6> the message sending interface thing.
<10> gah
<10> I am trying to write a NASM macro..
<8> _spin: I liked the interface
<10> I've want to be able to p*** a name and a number, so I was using %macro macro 2 \n global %2 push %1
<10> but it doesn't like making global a referenced arg
<10> any ideas on how to write a proper macro?
<8> "it doesn't like"
<8> I don't liek cold coffee
<8> like
<10> ok so..
<10> how do I p*** a variable from a macro to global?
<10> D:
<10> I have my macro working and everything, just can't figure out how to global it
<8> I think I already did such a thing, but I don't find it... maybe I just failed
<8> anyway, you can look at the preprocessed output
<8> and see what's wrong
<10> well I get an error
<10> as in identifier expected after global
<10> :/
<8> bye
<6> geist: why do something like this:
<6> int fs_bootstrap(void);
<6> int fs_bootstrap(void)
<6> {
<6> dprintf("bootstrap_zfs: entry\n");
<6> return vfs_register_filesystem("zfs", &zfs_calls);
<6> }
<6> sorry for the paste
<6> and by this, I mean the defining the fs_bootstrap twice
<13> kiva, hi
<14> hello :)
<6> alright, sorry for the quick stream of questions, but if I want to define an init routine in some kernel driver, and I don't want another file with a long bunch of ifdefs and foo_init() calls that tries to initialize the drivers, what's the best way to get around that?
<6> linux seems to use some linker magic http://fxr.watson.org/fxr/source/include/linux/init.h?v=linux-2.6#L92
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