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Comments:
<0> hello
<0> is CS only a real mode register?
<1> no
<1> all the registers exist in all modes (ignoring x86-64 for the moment)
<0> is eip just cs + ip?
<0> i mean cs:ip
<1> eip is the 32 bit ip
<0> ok that is what i thought
<0> so cs:ip is only used in real mode?
<1> no
<1> cs:ip is used in 16 bit pmode and cs:eip is used in 32 bit pmode...it means something different in pmode but it;s still there
<0> is that for the 32-bit processor 64gb support?
<1> what is 64gb support
<0> 64GB of ram
<1> not so much
<1> you may want to read a doc on intel's pmode
<2> can anyone recommend a good ARM asm reference? specifically for ARM920T, or as close as possible. not too long (800 page official specs), not too short (1/2 page mnemonic list). id like something that covers the mnemonics by category, and a short description of their parameters.
<3> is this the sparr I know from cube? x)
<2> there can be only one!
<3> weird
<4> oh rly sparr ?
<4> ;D
<2> o rly
<5> hi
<6> re
<5> when cpu gets command (opcode/operand) from RAM does that command get read by 32 pins on cpu?
<5> 32 bit command ==> 32 "high voltages" on 32 pins?
<6> don't know much about that. But anything read from/written to memory p*** through a single but which is 32-bits wide (the length of a machine word) on IA-32 and 64-bits wide on 64bits archs. I think.
<5> mElo_: yea...i wonder what each of those wires of the 'bus' is attached to on cpu
<6> so the answer is yes.
<5> mElo_: thanks
<7> no that's crack
<6> ok please save us :)
<7> memory buses have been 64 bits wide for a long long time
<7> (in '32-bit' processors too)
<7> specifically pentium was the first cpu to have a 64-bit bus
<6> so processors always fetches a quadword from memory whatever the "operation size" (byte/word) is ?
<6> (or dword)
<7> well actually processors always fetch a so called cache line
<6> ah yeah the cache
<7> for example pentium 4 has cache line size of 128 bytes
<5> oggis__: thanks...is the **bus** a bunch of wires connected to cpu?
<6> is the cache lines filled with aligned memory region, i.e. 128bytes aligned memory in yr example?
<5> oggis__: is there a part of cpu called the 'bus' too?
<7> well, it really depends
<7> k8's have the integrated memory controller and other cpus have a front side bus
<5> oggis__: please describe the difference if you don't mind
<7> and the front side bus i was referring to is always 64 bits, and so is k8's integrated memory controller buses because it accesses ddr memory, which also has a 64-bit wide bus
<7> then in socket 939 / am2 k8's there are two 64-bit wide memory buses (dual channel)
<7> mElo_: yep, a cache line is always filled from a aligned memory region
<7> mElo_: that's why you should aim to align for cache line alignment in stuff
<6> ok thx very much, gonna read some optimization ebooks from intel...
<8> hello
<6> re
<6> I wonder about the instructions cache: If I can fit a few algorithm functions (kind of recursive for example) into the cpu cache, can I expect that the only memory accesses are only for data transfer?
<8> what other memory access is there ?
<6> pireau, for fetching instructions I think.
<8> is that a data transfer ?
<6> yes but it's a data transfer of instructions. Versus data which are manipulated by instructions, i mean.
<8> ah !
<7> mElo_: yes, you can expect that
<6> ok
<9> your all gay
<8> wow he's smart,
<10> hi everybody
<10> i have ***embled a simple program that make a WSAStartup windows api call, but i don't understand why running it i have a violation access exception...
<10> i believe that the parameters p***ing are correct...
<10> besides, i have compiled the same program with WSAStartup call throught dev-cpp... and there are additional call and there's no parameters push :O
<7> wrong calling convention?
<10> oggis__, i don't know what convention should use... here there's the code http://paste.plone.org/7564
<7> me neither
<7> sorry, I'm not a windows programmer
<10> yeah
<6> hkj2, when you load ver at line 41, you load 4 bytes but your declaration consist of only 2 bytes, which eventually causes a segfault. i think.
<10> i try using ax
<6> but it's certainly not the problem.
<10> nothing, i the problem is the calling convention as oggis__ said
<10> *maybe
<6> seems to be stdcall, so yr code seems ok.
<6> hkj2, on the web I found that szDescription should be 257 characters and szSystemStatus 129.
<10> i try
<10> nothing, i writed also masm code before for using default microsoft include, but i have the same problem at running
<10> STOS WORD PTR ES:[EDI] this is the second instruction in WSAStartup that give me violation error
<10> ES:[EDI] points to .text segment of ntdll...
<6> but what's laoded in edi...
<10> ntdll.7C910738 ... by default...
<10> i try to xor edi?
<11> hello
<11> i have an asm source file.every line ends up with ^M
<11> what is this ^M
<10> mElo_, see the call here http://www.metasploit.com/sc/win32_bind.asm ... it sub to sp..
<6> hkj2, yes it allocates space on the stack for the WSADATA structure, which in fact seems to be 402 bytes.
<6> conico, that's a new-line (<=> line-feed), in C: \n
<10> mElo_, same problem
<6> or maybe a carriage return.
<11> thank you
<6> you need to get rid of it?
<11> i did it with tr
<6> :)
<11> :)
<6> kind of impossible things to do under windows, I often feel like I'm restricted there...
<12> get the cygwin stuff
<6> yeah. (in fact I'm under Linux)
<6> hkj2, did you try the "sub esp,402; push esp;" method ?
<10> yes
<10> how has he obtained this address? dd 0x3bfcedcb ; WSAStartup 32
<6> you said you replaced "mov eax,[ver]" by "mov ax,[ver]", maybe issuying a "push ax" afterwards would be better (so that the high word gets cleared on the stack). Or you can "xor eax,eax" to achieve the same purpose. Or movzx eax, word ptr [ver] i think
<10> done yet
<6> ok. empirically, if I remember some DLL have a fixed base address so their entry points for a given windows' version can be expected to be the same. (unsure of this information).
<10> ok
<10> mElo_, probably could be the missing of other function call before WSAStartup, maybe they inizialize something...
<6> hkj2, it's all weird.
<10> mElo_, i believe there's something wrong with WSAStartup address...
<10> but should i use import directive for load dll with nasm?
<13> hey
<13> what ASM can do that C cant?
<14> hardware control and speed, but it depends on compiler and users ability
<13> and
<13> this hardware control
<13> is only about processors
<13> corrects?
<13> correct?
<14> no
<13> what otherS?
<14> io
<13> hey hey, i am not talking about progrmming on HARDWARE
<13> hmm, how can i explain
<14> ? any computer IS hardware
<13> i am not talking about to programming to build a hardware.
<13> not to hardware work
<13> but in the computer
<13> like doing O.S. drivers...
<13> making*
<13> (sorry for the english, it isnt my native language)
<14> exactly drivers control hardware
<13> yes.. but, cant i do it with C?
<14> probably yes
<13> hmm
<15> http://paste.uni.cc/8768
<15> pls help
<6> s/move/mov ?
<14> mov
<15> oh man
<15> thank you
<15> it took me 30 hours
<15> minutes
<15> ozan.asm:7: error: invalid combination of opcode and operands
<15> it gives this error now
<14> read the intel manual, dont invent instructions
<16> what's PutInt? a macro?
<15> i think so the writer of the book put it
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