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Comments:
<0> OS/2 = Operating System/2
<1> MrMojo: "OMG Stolen!"
<1> or maybe "Owned ****az!"
<0> OS/2 = Half an Operating System
<2> nah, vms/wnt is much cooler
<1> "i'm sorry bill, i can't do that."
<0> yeah yeah HAL/IBM blah blah
<0> there was a Bionic Woman episode where some ***hole set up a dooomsday device that would blow up the Earth if anyone set off a nuclear weapon
<3> btw, the new technology wasn't multitaskinng, it was ht emicrokernel nature of the OS. NT was designed to support different top level API personalities, like Win32, OS2, Posix, etc.
<0> they ripped off the computer from 2001
<0> the HAL 9000
<4> http://thismight.be/offensive/images/picpile/%5Bnamed%20as%20found%5De5082697311108e494120b5665f0412d.gif
<0> and called it the "Alex 7000"
<0> hahahahahahah
<5> so monday I decided to install norton systemworks 2006 and it asked me to reboot so i reboot...next thing I know, I cannot even see anything on my monitor even though it is on and my pc doesnt even want to boot up to atleast the bios screen..I know it is not my monitor or graphics card because if i keep trying manually turning on my pc, I will eventually get to the desktop and the comp will be able to function properly...but say
<0> peerce: yeah, and they're just now finally gonna actually do that with Vista
<3> actually, nt 3.1/3.5 had that, they took it OUT of nt4 and 5
<3> it as always half***sed
<2> had what?
<3> !info NORTON
<6> hey navce isnt that bad
<3> poxy; microkernel personalities for os2, posix, etc
<7> lol
<8> i like symantec corp 10
<2> peerce: you mean something like abi compatability on freebsd for linux/svr4/solaris?
<3> it was done at a deeper layer, where the kernel OS had NO usermode APIs at all, instead, the win32 API is a layer on top of the microkernel. perhaps its a bit like MACH in that respect
<0> with Vista they're doing the virtualization approach with the kernels on top of the hypervisor
<9> btw. Soak it.
<0> (and Longhorn)
<3> yeah, thats virtualization. differnet also
<0> yeah
<0> No matter what they do, however. The last words I will always say when leaving work at 5 every day is "Windows ****s. See you guys tomorrow"
<1> you're late.
<3> ibm pseries has had that foor awhile, where a pXXX big server can run multiple OSs (current choices are limited to AIX and Linux) on 'LPAR's which are logical parrtitions
<2> heh
<0> yeah IBM was virtualizing before most people doing virtualization now were even born.
<3> heh, yeah.
<3> VM/370!
<3> early 70s
<0> run VM under VM and ****
<0> IBM has that **** all deep too . you could do VM inside a VM inside a VM
<3> but that was done with software. LPARs are implemented at a hardware level, they actually partition CPUs in 1/10th f a CPU increment
<0> develop a new version of the VM OS from within VM
<3> you can ***ign physical hardware like ethernet cards, scsi controllers to a specific LPAR
<0> yeah see....I don't like the idea of virtual machines or even applications being aware of the multiprocessor nature of the hardware. No matter how many processors are available, no matter how it's virtualized, or even if it's not .. I think OSs should "see" one processor and the applications be totally unaware. The hardware should schedule threads across all the CPUs transparently.
<2> how can the virtualizer schedule the task of its child's os' threads on dfiferent cpus?
<3> but the hardware doesn't even know what a thread is
<3> thats a scheduler object
<0> well, then I guess I'm saying is the scheduler needs to be moved
<0> closer to the hardware
<3> but different OS's have different process models
<0> 12 CPUs in a box should look like one really powerful CPU
<0> then coders wouldn't have to think about whether their target hardware has multiple CPUs or not
<3> um, 1 really powerful CPU runs one thread 12X faster
<3> SMP doesn't work that way
<10> FK|Work` huh do you have any idea how difficult to make that happen that level of hardware abstraction would cost huge amounts $$ and hte control architecture would be ridiculously complex
<0> Castr00: I didn't say it was as simple as editing a line of code.
<3> wheree it gets hairy is where you want to SHARE a piece of hardware like a ethernet controller or a fiberchannel between differnet OS partitions
<3> IBM ha solved that
<3> they create virtual ethernets and virtual FCs. each LPAR can have its own IPs and stuff on a shared ethernet port
<3> if we go pseries at work, I'm hoping we can get a single 8-core server, and run our various systems on LPARs
<10> FK|Work` you wont see a level of hardware abstraction where an OS sees a multiprocessor system as a uniprocessor the performance hit would be HUGE there would be a ridiculous amount of stalls
<10> FK|Work` its been under research for years now and whoever comes up witha solution is going to become a billionaire
<3> you can move physical CPU resources around without rebooting :) so if server 'mondo' needs more power today for a benchmark, I could give it 6 cpus and have the other 3 servers sharing 2 cores
<2> well, i bet it could be done if one cpu does at the bigger level what the cpus do at the smaller level: predict, branch...where one cpu could paralellize instructions, the controller cpu would parallelize those to different cpus
<3> then its all one big CPU
<10> poxy then you create a bottleneck
<2> which is what FK|Work` was talking about
<3> as thats defined by the number of cucurrent execcution pipelines
<10> poxy and the the system is only as fast as the cpu that is the controller
<10> it wouldn't work
<10> then you have multiple cores idling
<10> waiting for the controller cpu to finish
<2> heh, the main cpu would just figure out how to parallelize the instructions
<0> yeah true
<10> you still create a huge bottleneck
<0> to do what I'm saying you would have to create a bottleneck like tjhat
<2> it could be specialized, to do that exclusively, which would speed it up
<3> sounds like a multichip single CPU to me
<3> or, if specialzied as you say, a SIMD dsp architecture
<3> [single instruction, multiple data]
<2> that would be the ultimate evolution of smp
<3> devolution perhaps
<10> I agree that there should be a level of abstraction so that applications have no knowledge of multiple cpus
<3> JAVA!
<10> and at the moment there are many companies working on this
<10> dear god no
<10> not java
<2> peerce: devolution... it can be figured out, optimized, and made to work
<0> well it's like. In Windows 2003, the affinity on the vmware process is set for both CPUs. I only ***ign a single CPU to the virtual machine. If I bring up task manager, it seems as if the load is equally shared between both CPUs. So in a sense, I'm doing just that.. virtualizing 2 physical CPUs into one CPU as far as the VM is concerned.
<3> threads in windows have no knowlege of multiple CPUs
<3> tey are just dispatched
<3> as cpu resources are available
<3> got a 8 thread/core machine? it will run 8 'ready' threads concurrently
<2> up to :P
<10> but the OS should have a knowledge of multiple CPUs and for many years to come thats the way it will be
<10> until some ingenious person revolutionizes the ULSI design landscape
<0> well, talk to any linux advocate, and they'll tell you an end-user should be able to do that redesign
<0> :D
<3> suns latest CPU has 8 cores that run 4 threads each, so its 32-way multiprocessor in a single chip
<0> the Sun T1 ?
<3> yeah
<3> knda slow at single threads
<2> kinda like how sun has always been
<0> does VMware Server run on Solaris :D
<2> slow for benchmark-like work
<3> my oracle programmer guru said it felt like each thread was 400Mhz :D
<2> FK|Work`: NO
<2> Very unfortunately, i think
<0> well actually
<2> well, i guess it's not even possible though
<2> it would hav eto emulate, not virtualize
<2> and there's qemu if you want that
<0> it wouldn't be any good without an x86 to T1 emulation layer anyway
<10> FK|Work` technicallly with the proper resources there is nothing keeping you from desiging your own cpu I did it for a cl*** I even had the chip fabricated if you have a ****load of ppl and money you can even ripoff intel or amds designs and modify them if you want
<10> how do you think intel recreated x86_64
<10> amd didn't just hand them the specs
<0> Castr00: tre. I dropped out of electronics cl*** though :D
<0> oh
<0> btw
<0> if anyone sees shaddow or digi or skoal
<0> just tell them I have the new CD
<0> I'll see them later though I guess
<3> the T1's instruction set is Ultrasparc, same as all the suns since, oh, 10+ years ago
<3> sparc was originally a 32 bit risc, ultrasparc added 64 bit to it
<2> i wonder how much being fully backwards compatable cost them in performance
<3> ooops, 20 years. Sparc came out in 1986
<2> this channel is one of the coolest around
<1> you're lost, aren't you?
<3> hhhahahahah
<1> either that or you think ****ing up will get you somewhere.
<3> ****ing up will get you a mouthfull of lint
<2> i say that after some drama from #unix
<0> * Now talking in #windows (DALNET)
<0> heheh
<2> there's tech talk here, there's help here, and there's a good mix of personality, but very little unnecessary drama
<1> HA.
<2> it's not stifled by any one or two ops
<0> <0> I'm here from EFnet #Windows
<0> <0> I've been sent to give you guys an ultimatum
<2> it's just natural
<1> oh jesus.
<2> i guess i'll stop now...
<10> haha
<2> it's my fault for ever joining such a ****ty channel anyway that i think something good is amazing :P
<1> FK's gonna get the damn channel pwnt.
<0> <k0n> anyone know where i should d/l torrents from when using azuerus
<0> <k0n> ?
<0> <k0n> ??
<0> <k0n> ???
<0> <0> k0n: from torrent sites
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